This invention relates to battery-driven portable devices of small size such as a portable radio telephone device, and more particularly, to a method in which pulse inputs are supplied to such a device for checking conditions of input power supplies and controlling activation or enabling of the device thereby reducing quiescent currents flowing in the device.
FIG. 6 is a block diagram showing the structure of a prior art power input controller used in such a portable radio telephone device. In FIG. 6, the reference numerals 1, 2, 3, 4 and 5 designate a power supply part, a first CPU (CPU1), a first LSI (LSI-1), a second LSI (LSI-2), and a second CPU (CPU2), respectively. A power supply voltage from a battery is normally continuously supplied to both the power supply part 1 and the second CPU 5 (CPU2), and, depending on the result of confirmation by the second CPU 5 (CPU2) which decides whether or not the sufficient conditions required for activating the device are satisfied, the power supply voltage from the power supply part 1 to the first CPU 2 (CPU1), the first LSI 3 (LSI-1) and the second LSI 4 (LSI-2) is turned on-off at the power supply part 1.
FIG. 7 is a block diagram showing the structure of another prior art power input controller used in a portable radio telephone device. In FIG. 7, the reference numerals 6, 7, 8 and 9 designate a power supply part, a CPU (CPU1), a first LSI (LSI-1), and a second LSI (LSI-2) respectively. A power supply voltage from a battery is normally continuously supplied from the power supply part 6 to be supplied to the CPU 7 (CPU1), the first LSI 8 (LSI-1) and the second LSI 9 (LSI-2), and the CPU 7 (CPU1) checks to confirm the sufficient conditions required for activating or power feeding the device when the above conditions are supplied to the CPU 7 (CPU1) by, for example, interruption (stop mode of CPU normal internal/external oscillation: power saving mode).
However, in the case of the prior art power input controller shown in FIG. 6, the power supply voltage is normally continuously supplied to the second CPU5 (CPU2). Consequently, the sum of a quiescent current in the power supply part 1 itself and a stand-by current in the second CPU 5 (CPU2) itself provides a quiescent current in the whole system. Also, in the case of the prior art power input controller shown in FIG. 7, the power supply voltage is normally continuously supplied to all of the CPU 7 (CPU1), the first LSI 8 (LSI-1) and the second LSI 9 (LSI-2). Consequently, the sum of a quiescent current in the power supply part 6, a stand-by current in the CPU 7 (CPU1), a stand-by current in the first LSI 8 (LSI-1) and a stand-by current in the second LSI 9 (LSI-2) provides a quiescent current in the whole system. Thus, in each of the prior art power input controllers shown in FIGS. 6 and 7, the flow of the quiescent current in the whole system consumes a current value of about 100 .mu.A, and they have had a problem that the effect of current saving was not enough. Particularly, in the case of the prior art controller shown in FIG. 7, the quiescent current in the whole system tended to be greatly affected by a stand-by current in a device in which the controller is to be incorporated. Therefore, the above fact had to be carefully considered for the selection of the device.